CS 2521 Study Questions: Exam 2

Fall 2009

Revisions:

None yet.

Material covered:

Chapter 2.9: Bytes, Halfwords, ASCII, Unicode
Chapter 2.4: Signed and Unsigned Numbers
Chapter 2.5-2.10: Instruction Coding
Chapter 2.12: Linking and Loading
Chapter 2.14: Arrays versus Pointers and lui instruction
Appendix C.5: ALU Organization
Chapter 3.1-3.4: Overflow, Exceptions; Multiply and Divide
Chapter 3.5: Floating Point
Chapter 4.1-4.4: Datapath & Simple Implementation

Homework questions due: Monday, 16 November 2009 [15 pts]:

Homework is due at the start of class on the due date. Late homeworks will not be accepted. Homeworks must be type-written, and not hand-written. Keep a copy of your homework, and bring this with you the day of the quiz/exam review (i.e., the day the homework is due). This should help you in the review session.

Solve the following problems:

#1 [1 pt]
#3 [1 pt]
#5 [1 pt]
#6 [1 pt]
#8 [1 pt]
#9 [1 pt]
#12 [1 pt]
#13 [1 pt]
#15 [1 pt]
#20 [1 pt]
#21 [1 pt]
#26 [1 pt]
#33 [1 pt]
#34 [1 pt]
#36 [1 pt]

    Chapter 2.9: Bytes, Halfwords, ASCII, Unicode

  1. The instruction lb $s0, DataByte($zero) executes with the byte value 0x80 located at address DataByte in RAM. What is the $s0 register value after the instruction executes?
  2. With ASCII characters why is the "lb" instruction OK to use? (i.e., "lbu" is not necessary).

    3. Chapter 2.4: Signed & Unsigned Numbers

  3. Using the 2's complement, negate the following binary number: 00111000. That is, assume that the number is +X, and determine -X.
  4. How do you determine if a 2's complement addition resulted in an overflow?
  5. What is the base 10 value of the following two byte 2's complement numbers? (a) 0xfa10, (b) 0x8136, (c) 0x7000.
  6. Convert the decimal number -2047 into 2's complement, binary number.

    7. Chapter 2.5-2.10: Instruction Coding

  7. Do all MIPS instructions have an opcode? Yes or No. Explain.
  8. Convert the following assembly language instructions into binary and hex machine code:
    sub $s0, $s0, $s1
    andi $t0, $t1, 0x00ff
  9. Convert the following machine code into assembly language:
    0xac240204
    0x14040002
  10. Exercise 2.12.1 (p. 190) from text.
  11. Exercise 2.12.2 (p. 190) from text.
  12. All MIPS instructions are fixed-length (32 bits). Why might it be useful to have variable length instructions for a CPU? If instructions were variable length, how would the CPU determine the instruction length?
  13. What is PC-relative addressing? Why are signed relative addresses useful for PC-relative addressing?
  14. Does the jr (jump register) instruction implement a form of relative addressing? Yes or No. Explain.

    15. Chapter 2.12: Linking & Loading

  15. We say that a linker "resolves external references". Explain this in terms of the use of an external library.
  16. Explain what is meant by the compiler optimization of "procedure inlining". How does this accomplish optimization?
  17. What is relocation?
  18. What does a linker do?
  19. What is common subexpression elimination? How does it work?

    20. Chapter 2.14: Arrays versus Pointers and lui instruction

  20. What specific and actual MIPS instructions (not pseduoinstructions) could be used by the assembler to implement the following pseduoinstruction:
      li $s0, 0x7fffffff
    Explain your answer.
  21. Give that you have access to the multiply instructions from Chapter 3, write the following C language function in assembly language: 
    	#define NUM_COLS 10

    /*	A function to return an array element from a 2D array.
        In C, the NUM_COLS (a constant) is necessary. In assembly language,
        the array parameter would just be a pointer, and the numberColumns parameter
        would contain the value NUM_COLS.
    */
    int GetArrayElement(
        int theArray[][NUM_COLS], 
        int numberColumns, int rowIndex, int columnIndex) {
            return theArray[rowIndex][columnIndex];
    }

    22. Appendix C.5: ALU Organization

  22. Draw a diagram of a 1-bit ALU that can do addition, bitwise AND, bitwise OR, and bitwise NOT operations.
  23. Is an ALU constructed from combination or sequential logic? Explain.
  24. One strategy for constucting a 32 bit ALU is by connecting together 32 single bit ALU's. True or False. Explain.
  25. What is the value of the Carry In bit for bit 0 of a ripple carry adder?
  26. What are the appropriate values for Ainvert, Binvert, CarryIn, and Operation for this ALU structure to implement a nor operation?
  27. What are the appropriate values for Ainvert, Binvert, CarryIn, and Operation for this ALU structure to implement a subtract operation?
  28. Explain how an slt operation is implemented with the ALU structure we considered in class.

    29. Chapter 3.1-3.4: Integer Multiplication & Division

  29. In a new CPU design, the machine word has 68 bits per machine register. How many bits should be used (at most) to form the result of a binary integer multiplication? Explain.
  30. For that same 68 bit word CPU, how many bits should be used to form the result of a binary integer division? Explain.

    31. Chapter 3.5: Floating point

  31. A RAM array with 120 entries is declared statically in MAL (a .data section of the program) by the following code: 
          A:        .double  1.0:120
    What MAL instruction do you use to get the base address of A into register $t0? If the index of an entry in this array is in $t1, how do you compute the address of the entry?
  32. Convert the following base 2 numbers to base 10: (a) 0.1001, (b) 0.001, (c) 0.111
  33. Convert the following base 10 decimal numbers to base 2, in normalized scientific notation: (a) 10.25, (b) 31.75, (c) 18.1, (d) -50.687.
  34. Convert the numbers from the last question to IEEE 754 single precision representation. Leave the result in hexadecimal.
  35. The MIPS processor provides the use of special purpose floating point registers (e.g., $f0, $f1 etc). To load these registers with data, you must use an instruction like "l.s", and not the "lw" instruction. Why?

    36. Chapter 4.1-4.4: The processor

  36. Question 4.1.1, 4.1.2, 4.1.3 (p. 409 of text) -- answer the question for both instructions given in the table that comes before the question.
  37. What two basic operations are performed by the Register File?
  38. Exercise 4.2, p. 410.