University of Minnesota Duluth
Department of Electrical and Computer Engineering
ECE 4305 - Computer Architecture
Fall 2006

Lecture 1 - Programmable Logic	Lecture 2 - Microcomputer Systems
Lecture 3 - CPU Internal Architecture	Lecture 4 - ROMs Design Aspects
Lecture 5 - Registers & RAM Memories	Lecture 6 - PLAs Design Aspects
Lecture 7 - PALs Design Aspects	Lecture 8 - Commercial PALS & GALS
Lecture 9 - Data Paths	Lecture 10 - Data Paths Control Signals
Lecture 11 - Control Unit Design	Lecture 12 - General Purpose Data Paths
Lecture 13 - CPU Design	Lecture 14 - Algorithmic State Machines
Lecture 15 - Algorithmic State Machines Examples	Lecture 16 - VHDL
Lecture 17 - CPU Implementation	Lecture 18 - CISC-RISC