The register-memory architecture is a compromise to the CISC ideal. It covers a range of limitations imposed on a memory-memory architecture. There have been a variety of restrictions that allow at least one memory operand in arithmetic and logical instructions, but require certain operands to be in registers. Often, the instructions only had two operands, with one of the source operands also serving as a destination operand. Generally, as technology reduced the cost or chip area of circuitry, the restrictions were lifted.
A = B*(C + D)
For this example, it is assumed that the instruction set has two operand arithmetic instructions, the first source operand is also the destination operand and only the second source operand can be in memory.
| Instruction | Code Size | Data | |
|---|---|---|---|
| load | R, C | 4 (1 + 1/2 + 2) | 4 |
| add | R, D | 4 (1 + 1/2 + 2) | 4 |
| mul | R, B | 4 (1 + 1/2 + 2) | 4 |
| store | R, A | 4 (1 + 1/2 + 2) | 4 |
| Total | 16 | 16 | |