There are five basic data access styles, which are described in more detail in the web pages linked below. From the point of view of the CISC philosophy, the memory-memory style was the ideal. The accumulator and register-memory styles were tradeoffs between cost or chip space and the CISC ideal. The stack style was advocated by some people, but had little success except as an architecture for virtual machines. Modern RISC processors are exclusively load-store architectures.
The web pages below, in addition to describing the data access styles, show examples of assembly language coding for a segment of high-level language code. For these examples, the code size for each instruction is shown along with the data transfer size between tthe processor and memory. The code sizes assume that the operation code is 1 byte, each register code is 1/2 byte, and each memory address is 2 bytes. It is assumed that all data operands are 4 bytes.