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Processor functionality
- data movement
- data transformation
- data comparison
- sequence control
- system access
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RISC and CISC
- difference in objectives
- complexity of instructions
- use of memory in data transformation instructions
- variable or fixed length instruction coding
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Registers
- general purpose (programmer accessible)
- program counter (PC, Pointer in Figure 4-3)
- instruction register (IR, Instruction in Figure 4-3)
- program status word
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Fetch/execute cycle
- fetch instruction into IR, increment PC
- decode instruction, fetch source operands
- do operation
- store result
- RISC-CISC differences
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Instructions and instruction coding
- operation (opcode)
- register operands
- memory operands
- RISC-CISC differences
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Implementing control structures
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Enhancements
- pipelining
- pipelining hazards
- speculative execution and branch prediction
- multiprocessing
- RISC advantage