EE 2212

PROBLEM SET 9

S. G. Burns

Due: Wednesday, 10 April 2013

Note:  I am looking for circuit diagrams and specifications for audio power amplifiers that you may have for some of your “stuff”.  Information such as circuit diagrams, specifications for your  sound systems, guitar amps, car stereos, powered sub-woofers, associated power supplies, speaker systems, etc.  The meaner and badder the better!  I would like to borrow the material to supplement our class discussions on power amplifiers in a few weeks.   

We have been using the CMOS CD 4007 IC in lab the last three weeks.  There is a large family of logic and Boolean functions available  in the 4XXX family. These two additional problems on CMOS will assist you in understanding the concepts you demonstrated  during  the 4 April laboratory.

  1. The following is a circuit diagram from the CMOS 4XXX series of ICs.  Assume VDD = 5 volts and is a LOGIC ONE and VSS = 0 volts       is  a LOGIC ZERO

ProblemSet7Support 001

Fill in the following table and indicate which Boolean function is being implemented.

Pin 1

Pin 2

Pin 3

0

0

 

0

1

 

1

0

 

1

1

 

          Boolean Function being implemented:___________________________

 

  1. The following is a circuit diagram from the CMOS 4XXX series of ICs.  Assume VDD = 5 volts and is a LOGIC ONE and VSS = 0 volts is  a LOGIC ZERO.  When you study this circuit, you will observe that the circuit in Problem 1 is embedded as a sub-circuit in this problem.   You may find it convenient to mark up the diagram with intermediate logic levels as you work your way through the circuits.

ps10support     

Fill in the following table and indicate which Boolean function is being implemented.

 

A

B

C

D

E

X

0

        0

 

 

 

 

1

        0

 

 

 

 

0

 1

 

 

 

 

1

        1

 

 

 

 

 

Boolean Function being implemented:___________________________

 

3.       Text 5.4 A short “plug-and-chug”

 

NOTE: Table 5.2 on Page 230 is a very important reference for the remaining problems.

 

4.       This problem is an expanded  version of Text 5.38. Complete the following table.   To support each of your table entries, draw and label  a symbol of the npn transistor and illustrate the junction bias conditions by showing the two diodes with the appropriate bias conditions.  Your Region of Operation will be either forward-active, reverse-active, cutoff, or saturation.  Observe that the definition for  saturation in a BJT is entirely different than the definition for saturation in a FET!!!

For an npn BJT

VBE (in volts)

VCE (in volts)

BE Junction Bias

(Forward or Reverse)

CB Junction Bias

(Forward or Reverse)

Region Of Operation

+0.7

+5

 

 

 

-5

+5

 

 

 

+0.7

+0.2

 

 

 

-0.7

+5

 

 

 

 

5.       Text 5.39 which looks at several different connection possibilities.

         

6.       This problem is an  expanded  version of Text 5.42. Complete the following table.   To support each of your table entries, draw and label  a symbol of the pnp transistor and illustrate the junction bias conditions by showing the two diodes with the appropriate bias conditions.  Your Region of Operation will be either forward-active, reverse-active, cutoff, or saturation.  Observe that the definition for  saturation in a BJT is entirely different than the definition for saturation in a FET!!!

For a pnp BJT

VBE (in volts)

VCE (in volts)

BE Junction Bias

(Forward or Reverse)

CB Junction Bias

(Forward or Reverse)

Region Of Operation

+0.7

-5

 

 

 

-0.7

-5

 

 

 

+0.7

+0.2

 

 

 

-0.7

-0.2

 

 

 

 

 

7.       Text 5.43  which looks at several different connection possibilities

Alternate definitions for a blocking capacitor, a bipolar (junction transistor), and dynamic range.

           BlockingCapacitor BipolarCartoon  DynamicRangeCartoon