EE 2212

PROBLEM SET 6

S. G. Burns

Due:  Wednesday, 1 March 2017

 

NOTE 1:  I strongly encourage studying the   photonic concepts and devices from the 20 and 22 February classes  (Photonics PowerPoint)  even though this problem set doesn’t  include many problems.  Problems associated with Text Section 3.18 are quite limited but the optoelectronics area is of rapidly growing importance. 

 

NOTE 2: Table  4.6 on Page 203 provides useful generic FET specifications information.  Appendix B also has quite a bit of FET information.  If these data are not provided in any of the Chapter 4 text problems, use information in Table 4.6.  Also the inside of the front cover has all sorts of useful data.  Just below Table 4.6 on Page 203, you will also find some key constants; also on the inside of the front cover. 

 

Note 2:      I also want to call your attention to the following link from our WEB page  FETNMOSSummary.jpeg  and FETPMOSSummary.jpeg

 

Note 3:      Be sure your WEB browser displays symbol font correctly.

 

Note 4:      Problems 1 and 2 are a bit of plug-and-chug.

1.      Text 3.118  You can use MATLAB or MATHEMATICA to do this but the most conceptual approach is taking the         first derivative  and setting the derivative to zero to find the function maximum or minimum.

 

2.      Solar Panel (Adapted from an old quiz)   

          This commercial solar panel has an area of 1.6  m2.  The I-V curves are shown below.  Estimate/compute values               for the quantities indicated.                          Illustrate your answers on the vendor I-V curves. 

(a)               _____________Reasonable accepted value for the solar constant above the Earth’s atmosphere.

(b)              _____________Reasonable accepted value for the solar  constant at the surface of the Earth.

(c)                At the Earth’s surface, the solar spectrum peaks in the  (IR, Red, Green-Yellow, Blue, UV).

(d)              ______ Open Circuit Voltage,  VOC.

(e)                 ______Short Circuit Current, ISC

(f)                 _______Estimate of maximum Power Output corresponding to your answer in Part (b) above  and                                 illustrate, on the graph,  how you obtained this value.

(g)               ________________  Panel Conversion Efficiency, %, using your results from Part (f) above.

Area = 1.6 m2

 
 


 

 

 

3.      Text Problem 4.1 (Look at Figure 4.2 for guidance)  and Text Problem 4.2 as a combination.  For Text 4.2 observe         that this is Cox, capacitance per unit area. Watch your units. Usually farads/cm2 are preferred for the capacitance        per unit area units. When the text and in the industry talks about an MOS capacitor, they are usually referring to        capacitance/unit area. The total capacitance can then be scaled by the W x L product.  This idea of scaling is a very     important VLSI design concept.  The parallel plate basic capacitor model works well!  We will also soon observe       how this plays into imaging and display applications.

 

4       Text 4.4 and 4.8 for NMOS and 4.47 for PMOS.  Some additional basic calculations to provide experience in units           and nomenclature.  Organize your results in a table.  Appendix B2 has a table defining the relationships for key   FET model parameters.  Refer to the WEB links in Note 2.

 

 

5.      From an old quiz.  Regions of operation are very important in circuit design using MOSFETS.  Extracted from an      old quiz.    For the indicated           bias conditions, state whether the FET is operating in the OHMIC (TRIODE)          region, SATURATION region, or CUTOFF region.  Explain your reasoning.   Assume that |VT | = 2  volts for          both the NMOS and PMOS enhancement mode transistors. 

     M1 __________                   M2 __________                   M3 __________    

     M4 __________                   M5 __________                   M6 __________

 

This is what we use for blocking dc and passing ac in many discrete device amplifier circuits.    Synonymous with coupling capacitor.  Also a dc blocking capacitor is employed in your oscilloscope when switching to AC input using the soft keys.   I’ll explain this in lab.

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Consider the signal swing around the Q-Point which established the dynamic range of a circuit  which we will use in amplifier design

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Even though you are an EE student, there is some information you can use from CS I.  Of course, you can always dive deeper into CS but it messy in more ways than one.  I don’t know if this diagram is covered in more advanced CS courses if you decide to work on a CprE or CS  Minor.  Can you tell that I am a hardware guy!

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