Most general purpose processors have instructions for shifting bits in a word. In addition, shifting is involved in two basic arithmetic operations: multiplication and division.
Shifting bits in hardware is a simple matter of rearranging the wires.
To support controlling a shift a multiplexer is needed.
The diagram below shows a circuit that, depending on the Op
control signal, can either shift bits to the right by n bit
positions or not shift them.
The >>n notation is borrowed from C, C++, and Java
to indicate a right shift of the wires by n bit positions.
For the right shift shown above, an issue arises about how to deal with the left n bits in the result. A similar issue arises in a left shift. The resolution of this issue is determined by an end fill policy.
The MIPS sll (shift left logical) and srl
(shift right logical) instructions fill with 0 bits.
These instructions use the sa instruction bits (R-type
bits 10-6) to specify the shift amount.
There are also sllv (shift left logical variable) and
srlv (shift right logical variable) instructions that
use the rs register to specify the shift amount.
The MIPS sra (shift right arithmetic) and
srav
(shift right arithmetic variable) instructions fill with copies of
the high-order sign bit.
The sra instruction uses the sa
instruction bits (R-type bits 10-6) to specify the shift amount.
The srav instruction uses the contents of the
rs register to specify the shift amount.
The MAL rol (rotate left) and ror (rotate
right) instructions wrap bits shifted off one end of a word, using
them for fill at the other end.
These instructions are pseudo-instructions composed from logical
left and right shift instructions and a bitwise or instruction.
Some processors implement rotates in hardware.